Post-Synthesis Processing of CdSe NCs and Nc Solids: Correlation Between Surface Chemistry and Optoelectronic Properties
We show that post-synthesis washing and ligand exchange of CdSe nanocrystals (NCs) and NC solids using methanol removes ligands and Cd from the NC surface, creating localized charge carrier trap states. We correlate the photocurrent through CdSe NC solids with such trap states and show that the photocurrent can be increased by passivation of the traps through treatment with CdCl2
Engineering Charge Injection and Transport in PbSe NC Devices and Circuits
By engineering the contact metallurgy and nanocrystal ligand exchange chemistry and surface passivation in PbSe nanocrystal thin film transistors, we tune the polarity and magnitude of charge injection and transport and demonstrate an insulator-to-metal transition as we strengthen the nanocrystal coupling and increase the carrier concentration in the nanocrystal channel. Using n-type and p-type PbSe nanocrystal transistors realized by selecting the contact metallurgy, we construct complementary, integrated nanocrystal circuits from a single nanocrystal material.
Low-Frequency (1/f) Noise in Nanocrystal FETs
We investigate the origins and magnitude of low-frequency noise in high-mobility nanocrystal field-effect transistors and show the noise is of 1/f-type. We show that 1/f noise relates to NC thin-film electronic structure, where the McWhorter model describes 1/f noise in the subthreshold regime and the Hooge model describes 1/f noise in the device linear and saturation regimes.
Plasmon-Enhanced Upconversion in Individual Self-Assembled Heterodimers
We utilized template-assisted self-assembly to form discrete nanocrystal heterodimers
consisting of a single upconversion nanophosphor and a single gold nanorod. By matching the
surface plasmon resonance of the nanorods with the excitation wavelength of the phosphors
and by spatially localizing the phosphors in the intense near-fields surrounding the rod tips,
several-fold luminescence enhancements were achieved.
Gate Induced Carrier Delocalization in QD FETs
Our DOE SISGR team used gate-dependent, low temperature resistance and magnetotransport measurements to study indium-doped CdSe QD FETs. We showed that with increasing gate voltage the localization product (localization length times dielectric transport) describing transport of accumulated carriers, suggests the localization length increases significantly beyond the QD diameter.